<?xml version="1.0" encoding="utf-8" ?> <rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"> <channel> <title> <![CDATA[ Search for 'au:&quot;Bhasker, J&quot;']]> </title> <link> /cgi-bin/koha/opac-search.pl?q=ccl=au%3A%22Bhasker%2C%20J%22&#38;sort_by=relevance&#38;format=rss </link> <atom:link rel="self" type="application/rss+xml" href="/cgi-bin/koha/opac-search.pl?q=ccl=au%3A%22Bhasker%2C%20J%22&#38;sort_by=relevance&#38;format=rss"/> <description> <![CDATA[ Search results for 'au:&quot;Bhasker, J&quot;' at ]]> </description> <opensearch:totalResults>11</opensearch:totalResults> <opensearch:startIndex>0</opensearch:startIndex> <opensearch:itemsPerPage>50</opensearch:itemsPerPage> <atom:link rel="search" type="application/opensearchdescription+xml" href="/cgi-bin/koha/opac-search.pl?q=ccl=au%3A%22Bhasker%2C%20J%22&#38;sort_by=relevance&#38;format=opensearchdescription"/> <opensearch:Query role="request" searchTerms="q%3Dccl%3Dau%253A%2522Bhasker%252C%2520J%2522" startPage="" /> <item> <title> VHDL Primer </title> <dc:identifier>ISBN:</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=8100</link> <description> <![CDATA[ <p> By Bhasker, J.<br /> PEA 2001 .<br /> 373 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=8100">Place hold on <em>VHDL Primer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=8100</guid> </item> <item> <title> Verilog HDL primer </title> <dc:identifier>ISBN:</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=8111</link> <description> <![CDATA[ <p> By Bhasker, J.<br /> B. S.P 2001 .<br /> 294 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=8111">Place hold on <em>Verilog HDL primer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=8111</guid> </item> <item> <title> VHDL synthesis primer </title> <dc:identifier>ISBN:</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=8116</link> <description> <![CDATA[ <p> By Bhasker, J.<br /> BSP 2001 .<br /> 296 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=8116">Place hold on <em>VHDL synthesis primer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=8116</guid> </item> <item> <title> Verilog HDL synthesis </title> <dc:identifier>ISBN:</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=8117</link> <description> <![CDATA[ <p> By Bhasker, J.<br /> BSP 2001 .<br /> 215 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=8117">Place hold on <em>Verilog HDL synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=8117</guid> </item> <item> <title> VHDL promer </title> <dc:identifier>ISBN:</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=8434</link> <description> <![CDATA[ <p> By Bhasker, J.<br /> Pearson 2002 .<br /> 373 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=8434">Place hold on <em>VHDL promer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=8434</guid> </item> <item> <title> A VHDL primer </title> <dc:identifier>ISBN:</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9507</link> <description> <![CDATA[ <p> By Bhasker, J.<br /> Pearson 2006 .<br /> 392 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9507">Place hold on <em>A VHDL primer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9507</guid> </item> <item> <title> VHDL primer </title> <dc:identifier>ISBN:9788120323667</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=12571</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8120323661.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bhasker, J.<br /> New Delhi PHI 1999 .<br /> 373p , Reprint 2010 9788120323667 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=12571">Place hold on <em>VHDL primer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=12571</guid> </item> <item> <title> VHDL Primer </title> <dc:identifier>ISBN:</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=15385</link> <description> <![CDATA[ <p> By Bhasker, J.<br /> Noida Person 2016 .<br /> 395 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=15385">Place hold on <em>VHDL Primer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=15385</guid> </item> <item> <title> VHDL synthesis primer </title> <dc:identifier>ISBN:9788178000145</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=16943</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8178000148.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bhasker, J.<br /> Hydrabad BSP 2001 .<br /> 296 p. 9788178000145 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=16943">Place hold on <em>VHDL synthesis primer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=16943</guid> </item> <item> <title> VHDL primer </title> <dc:identifier>ISBN:9788120323667</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=17844</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8120323661.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bhasker, J.<br /> New Delhi PHI 1999 .<br /> 373p , Reprint 2010 9788120323667 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=17844">Place hold on <em>VHDL primer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=17844</guid> </item> <item> <title> System verilog primer </title> <dc:identifier>ISBN:9788178002804</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=21127</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8178002809.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bhasker, J..<br /> Hyderabad BS publications 2025 .<br /> 327p. 9788178002804 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=21127">Place hold on <em>System verilog primer</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=21127</guid> </item> </channel> </rss>
